Samsung’s 4nm Yield Stabilizes at 60–70%; True Battlefield Lies in 2nm
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Samsung Electronics’ 4nm yield reaches up to 70%; secures AI chip order from U.S. startup Tsavorite Mature 4nm and 8nm processes serve as short-term profit anchors; 3nm still lacks major client references Between TSMC’s high yields and China’s SMIC catching up, 2nm competitiveness will determine future market share

Samsung Electronics has reportedly raised its 4-nanometer (nm, one-billionth of a meter) foundry yield to the 60–70% range. While not an overwhelming figure, it signifies that the company has moved past years of yield-related skepticism and entered a stabilization phase. Foreign media outlets view this as a sign that Samsung has regained fundamental resilience in the mid-tier (second-tier) 4–7nm market. However, given that global competition has already shifted to 3nm and 2nm advanced nodes, analysts warn that unless this progress is replicated at 2nm, Samsung Foundry risks remaining in the middle tier.
70% Yield at 4nm Marks a Real Production Milestone
According to the semiconductor industry on the 10th, Samsung recently secured an order for 4nm-based AI chips from the U.S. AI semiconductor startup Tsavorite Scalable Intelligence (hereafter Tsavorite). The order is estimated to be worth around $100 million based on pre-orders. Samsung is also said to have clinched additional contracts with Anaflash (28nm) and Korean startup DeepX (2nm), reinforcing its momentum in securing new deals. A semiconductor industry insider noted, “TSMC is handling most of the volume for big tech firms like NVIDIA and Apple, making it difficult to take on new clients while simultaneously raising wafer prices,” adding that “this environment is opening new niche opportunities for Samsung.”
Although Samsung has consistently emphasized 4nm yield improvements at its Foundry Forums, market reactions have been lukewarm. In fact, in May, AMD reportedly withdrew a planned 4nm order from Samsung and shifted production to TSMC’s Arizona fab, citing concerns over advanced-node yields. This highlighted a possible discrepancy between Samsung’s official figures and the actual mass-production yields perceived by clients.
This time, however, the 60–70% figure carries a different meaning. It reflects verified, real-world yields based on customer production—not an internal target. Securing an AI chip order for Tsavorite’s high-difficulty Omni Processing Unit (OPU) using the 4nm process signals that Samsung’s process stability has been externally validated to a certain extent, marking a positive shift in perception.
Legacy 4nm Nodes: Mid-Tier Market and China’s Catch-Up Risk
Still, the industry views the stabilization of 4nm yields as a sign of regained operational strength rather than a game-changing breakthrough. The bulk of fabless (chip design) companies are now focused on 3nm production, with next-generation products already targeting 2nm. From a technology trend perspective, 4nm is a mature node—catching up with an earlier generation while the world discusses the next one.
The practical benefit for Samsung lies in regaining capacity to secure stable volumes in the mid-range market. By winning low- to mid-priced orders, Samsung can raise fab utilization and defend profitability. Many market observers believe that Samsung Foundry’s short-term performance improvement depends more on yield stabilization at mature nodes like 4nm and 8nm than on 2nm itself. These nodes serve as critical cash cows that sustain investment capacity for 2nm development.
However, even this zone is far from safe. According to foreign research firm TechInsights, China’s SMIC has already supplied application processors (APs) based on its N+2 7nm process for Huawei’s Kirin 9000S smartphone—effectively achieving a 7nm-class process using multi-patterning. Yet, because SMIC relies on multiple deep ultraviolet (DUV) exposures rather than extreme ultraviolet (EUV) lithography, its yields and costs are under significant pressure. The 7nm yields at SMIC remain low, making profitability difficult to achieve.
Vijay Rakesh, an analyst at Japan’s Mizuho Securities, stated, “The 7nm process yield at SMIC, Huawei’s key foundry, is still estimated to be at a very low 30% level.” Even so, if SMIC fully enters the sub-7nm segment, price competition across the mid-tier market will intensify. Thus, Samsung’s 4nm stabilization is seen by some as a temporary advantage—buying time before China penetrates deeper into the same segment.

Lessons from 3nm and the Wall Called TSMC
Ultimately, Samsung’s decisive battleground is 2nm. Yet its struggles to secure large-scale customers during the rollout of the world’s first 3nm Gate-All-Around (GAA) process in 2022 continue to cast doubts over its 2nm competitiveness. When Samsung announced 3nm GAA mass production that year, it touted a 45% power reduction, 23% performance gain, and 16% area shrink compared to 5nm, underscoring its technological edge. However, to date, Samsung’s 3nm GAA process still lacks major external fabless clients such as Apple, Qualcomm, or NVIDIA—while TSMC has already locked in these top-tier customers as its early adopters for the N3 series, cementing its dominance.
The production schedule and yield stabilization of Samsung’s Taylor, Texas fab will also be a critical factor. The company has announced plans to make Taylor its next-generation hub for 2nm and AI chip production. According to Reuters, Samsung is investing $37 billion to build a 2nm foundry and advanced packaging line there. The site is initially expected to produce 4nm and 3nm wafers before transitioning to 2nm, forming part of a strategy to integrate production and packaging for U.S.-based big tech demand.
By contrast, rival TSMC continues to attract customers despite aggressive price hikes. Taiwan’s DigiTimes reports that TSMC plans to raise its 2nm wafer price by more than 50% compared to 3nm, reaching around $30,000 per wafer, and to gradually increase prices for advanced nodes over the next three to four years. Yet, demand from key clients such as Apple, NVIDIA, and AMD remains strong.
In a recent technical briefing, TSMC said its 2nm process would deliver up to 15% higher performance and up to 30% lower power consumption than its N3 series. Industry estimates suggest that its pilot 2nm yields have already surpassed the 50% threshold. Meanwhile, TSMC’s mainstream 5nm and 4nm nodes are maintaining high yields, ensuring stable profitability across both advanced and mature processes.
AI’s Emerging Segment: 2nm as the Ultimate Test
Nevertheless, the Tsavorite order signals that Samsung is spotting new opportunities amid shifting market dynamics. Tsavorite describes its OPU as a “composable architecture” that unifies compute (CPU/GPU), memory, and interconnect within a single chip, reducing data-transfer bottlenecks and improving AI inference efficiency compared to conventional GPUs. The OPU is expected to be fabricated using Samsung’s 4nm SF4X process—marking an early foothold for Samsung in the emerging AI accelerator segment.
The key question now is whether Samsung can leverage its proven 4nm production capabilities and lessons from its 3nm GAA missteps to achieve parity with TSMC in power, performance, and area (PPA) at the 2nm level. While the industry expects Samsung to maintain its 2025 mass-production target, tangible financial contributions may come later. So far, no major external client wins have been announced in the early bidding phase. If the answer to that question turns out to be “no,” most experts agree that Samsung will likely remain focused on defending profitability in the mid-tier market rather than leading the next frontier of semiconductor manufacturing.
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