“10x Efficiency Using Existing Facilities” Carbon Semiconductors Move Beyond the Lab, Demonstrate Wafer-Scale Manufacturing Feasibility

Leveraging silicon processes, securing a foundation for commercialization
Accelerating efforts to ease equipment and process monopolies
A technology war extending beyond semiconductors into power and materials

A U.S. research team has implemented a carbon nanotube–based semiconductor process, declaring that a technology long confined to the research stage has reached a level applicable to real manufacturing environments. The emergence of a production method that departs from conventional processes heavily dependent on specific equipment and companies is beginning to reshape competitive dynamics in the semiconductor industry. As cracks form in a technology system that had been constrained for decades, large-scale investment and supply chain realignment are accelerating. In the United States and globally, competition in semiconductor technology is expanding beyond fabrication processes into power and materials.

“Full replacement premature, hybrid production more likely”

The Massachusetts Institute of Technology (MIT) and Analog Devices (ADI), the world’s No. 2 company in analog semiconductors, jointly published a paper titled “Automated Commercial Wafer Manufacturing of Carbon Nanotube Field-Effect Transistors” in the global science journal Nature on the 1st of this month. In the paper, the research team demonstrated a commercial process that precisely places carbon nanotubes while utilizing existing silicon foundry facilities without modification. This formally verifies the feasibility of mass-producing carbon semiconductors—previously considered beyond reach—and has drawn immediate attention from both academia and industry.

Carbon nanotube–based field-effect transistors (CNFETs) exhibit performance that surpasses silicon devices in both electron transport and thermal management. As silicon transistors enter sub-3-nanometer processes, leakage current and heat generation increase simultaneously, whereas carbon nanotubes deliver higher current under the same power conditions while generating relatively less heat. A 16-bit RISC-V microprocessor first unveiled by MIT in 2019 recorded energy efficiency roughly 10 times higher than silicon.

The primary technical challenge has been defect control during mass production. Carbon nanotubes partially exhibit metallic properties that interfere with transistor operation, a problem repeatedly cited. The industry had demanded purity levels of approximately 99.999999% (eight nines) to address this issue, a requirement far removed from practical mass production conditions. In response, MIT researchers introduced a defect-immune design (DREAM) that bypasses the issue by functionally neutralizing metallic nanotubes within circuits, reducing the required purity threshold to around 99.99% (four nines).

The industry expects this discovery to affect the overall semiconductor production framework. Because carbon nanotubes can be deposited on wafers through solution-based processes, dependence on extreme ultraviolet (EUV) lithography equipment can be reduced at the transistor formation stage. However, since subsequent steps such as interconnect formation still require existing equipment systems, it is considered premature to declare a full replacement. The prevailing view is that if the research expands to commercial-scale production, a hybrid manufacturing structure—maintaining existing facilities while introducing new device technologies—will become feasible.

Acceleration of semiconductor leadership realignment

Investment scale is expanding in tandem with technological innovation. The most symbolic example is Texas Instruments’ plan to invest $60 billion. TI announced in June of last year that it would invest more than $60 billion in seven semiconductor plants in the United States, stating that the move could support more than 60,000 U.S. jobs. The strategy aims to ensure stable domestic supply of analog and embedded processing chips as demand simultaneously expands across automobiles, smartphones, data centers, satellites, and industrial equipment.

This movement aligns with the U.S. government’s industrial strategy. U.S. Secretary of Commerce Howard Lutnick described TI as “a cornerstone American company that has driven technological and manufacturing innovation for nearly a century,” highlighting its collaborations with Apple, Ford, Medtronic, Nvidia, and SpaceX. This underscores how the U.S. government views semiconductors at the intersection of economic security and industrial revival. TI’s investment, one of the largest in U.S. semiconductor manufacturing history, is interpreted as further evidence that domestic manufacturing expansion is being pursued on the basis of actual procurement contracts and long-term supply chain stability.

Another distinguishing feature is that government funding is now flowing directly to advanced equipment startups. In December of last year, the Trump administration agreed to invest up to $150 million in xLight, an advanced semiconductor manufacturing technology startup. Founded in 2021, xLight is targeting the EUV market dominated by ASML. Beyond attracting fabrication plants, policy capital is now directly supporting candidate technologies that could disrupt equipment monopolies, reflecting a U.S. government judgment not to leave control over equipment and process leadership solely to private-sector dynamics.

Such large-scale capital injections have accelerated the pace of U.S. semiconductor supply chain restructuring. Since 2020, more than 60 semiconductor investment projects have been concentrated in Arizona, with cumulative investment reaching $205 billion. Taiwan’s TSMC, following its $12 billion Arizona fab agreement signed during the first Trump administration, announced an additional $100 billion investment in March of last year, while Amkor increased its investment from $2 billion to $7 billion. SK hynix is also building a packaging facility worth approximately $4 billion.

Expansion into infrastructure and energy technology competition

Innovation driven by large-scale investments from companies and governments is spreading into power and materials, broadening the scope of technological competition. In February, Microsoft announced it had researched high-temperature superconductors (HTS) to improve data center power efficiency and developed a prototype server rack based on the technology. HTS materials, which have near-zero electrical resistance, enable long-distance power transmission without heat loss. Microsoft expects the technology to reduce the scale of power supply equipment such as substations, cables, and transmission lines, while improving energy efficiency and lowering infrastructure construction costs for data centers.

This approach stems from the assessment that power infrastructure bottlenecks are becoming critical amid surging demand for artificial intelligence (AI) and data-intensive computing. Data center operations require multiple substations for power transmission and voltage regulation, and because energy loss is unavoidable in this process, more power must be drawn than is actually needed. Microsoft emphasized that “HTS transmission lines can deliver the same amount of power at lower voltage and provide about 10 times higher capacity at the same voltage compared with conventional lines.”

The challenge is that the economic viability and practicality of such superconducting technologies require separate verification. Technology media outlet Data Center Dynamics pointed out that HTS generally requires cryogenic cooling, which entails specialized cooling systems and additional costs. Considering that Hg-1223, the material known to have the highest critical temperature under normal pressure, operates at –140°C, there remains a significant gap with data center operating conditions such as 18°C indoor temperatures and 27°C outdoor temperatures. This implies that superconducting server racks would necessitate a comprehensive redesign of cooling infrastructure, spatial layout, and maintenance systems.

Europe has also begun accelerating superconducting AI accelerator projects. On the 2nd of this month, the European Union’s EuroHPC Joint Undertaking announced the launch of a “superconducting AI accelerator design project for next-generation energy-efficient computing,” stating that it has initiated development of dedicated processors using superconducting circuits to maximize data center power efficiency. The project targets equivalent computational performance using only 5% of the energy consumed by conventional semiconductors, reflecting a calculation that even with the added burden of cooling costs, there is a viable path to competitiveness in energy efficiency.